New Electronics

Libero SoC v11.8 software provides debugging capabilities

The latest version of Microsemi’s Libero SoC software – version 11.8, a comprehensive suite of FPGA design tools – has been released. In addition to the software release, which includes enhancements ...
Electronic Design

FPGA Design Software Pinpoints Power Issues

The Actel Designer FPGA software tool features two new capabilities that speed the design process. The SmartPower analysis tool evaluates power usage, and the Netlist Viewer utility displays the ...
Design-Reuse

Microsemi Announces Libero SoC v11.8 Software Providing FPGA Designers Mixed Language Simulation and Best-in-Class Debugging Capabilities

ALISO VIEJO, Calif., Apr. 11, 2017 – Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced ...
Electronics Weekly

Actel adds power analysis to FPGA design

Actel has upgraded its Designer Series field-programmable gate array (FPGA) tool suite with two new capabilities. A power analysis tool, called SmartPower and Netlist Viewer, a utility that allows ...
Semiconductor Engineering

The Rise and Fall of Synthesis Bugs in Safety-Critical FPGAs

How to create an implementation signoff flow proving that the final FPGA netlist is functionally equivalent to the RTL model. For standards IEC 61508 / ISO 26262 / EN 50128 / DO-254. FPGAs are the ...