Engineers considermany forms ofcurrent leakagein electronicsystems tobe unusable.This thinkingis starting to change asdesigners begin to explorenew frontiers in ultra-low-powerdevices through ...
San Mateo, Calif. – As leakage current shoulders its way to center stage in chip designers' gallery of horrors, leading-edge design teams are rapidly developing ad hoc techniques to minimize its ...
Even as leakage overwhelms their power budgets, IC design teams are finding ways to plug the holes that are costing them dearly at sub-micron nodes. As 90-nm process technologies began entering the ...
Back in 1999, Bob Pease touched on the operation of CMOS transistors in subthreshold mode. In his article, he pointed out that analog designers can use CMOS ICs such as the CD4007, a dual matched pair ...
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