It’s no secret that hardware is the new currency in the chip world. It’s no longer the case that the semiconductor industry is in the hands of traditional semiconductor giants; an increasing number of ...

As digital systems become increasingly complex, traditional simulation-based verification is straining under the weight of exhaustive verification demands. While simulation remains a fundamental tool ...

How formal verification is able to find bugs before signoff. Formal verification’s ability to mathematically prove exhaustively that a chip design meets a set of assertions. Formal techniques are ...

SAN MATEO, Calif. — On the verge of closing its sale to Cadence Design Systems Inc., Verplex Systems Inc. this week is releasing an upgrade to its Conformal line of equivalence checkers. Tony Larson, ...

Formal verification, which uses mathematical analysis rather than simulation tests, has been available in commercial EDA tools for more than 20 years and in academia much longer. As with many new ...